1. Field of the Invention
This invention relates to the design of monolithic semiconductor circuits for providing highly accurate temperature compensated dual voltage references of adjustable magnitude.
2. Prior Art
In the design and fabrication of monolithic semiconductor circuits it is often desirable to have for ready availability two reference voltages each of which is a fixed percentage different from a central reference voltage, one such voltage being above the reference, the other such voltage being below the central reference. These references should be highly accurate and as nearly as possible should be temperature insensitive. Typically, the reference voltages should not vary by more than 10% of their difference from the central reference voltage for a temperature change of 100 degrees centigrade. Further, the two reference voltages should track each other very closely, such as within plus or minus 5% of the difference from the central reference voltage for the same temperature variation.
Such accuracy and stability can be achieved by use of standard negative feedback circuit design techniques. Such designs lead to relatively complicated circuits and fabrication techniques when compared to the design and fabrication of the circuit disclosed herein.
A circuit which provides for two voltages, one of which is a plus percentage, and the other of which is an equal minus percentage from a fixed reference is referred to as providing a percentage window. Various methods for the design and fabrication of such dual polarity voltage reference circuits have long been known. As an illustration, two reference voltages of 6 volts and 8 volts would form a plus and minus 1 volt window with respect to a reference of 7 volts. The most common way to set up a plus and minus percentage window would be first internally (i.e., on the monolithic chip) generate an accurate voltage reference of say 10 volts. This internal reference would be applied to an external (i.e., not on the chip) voltage divider network configured to provide the desired dual level references. For example, the 10 volts reference could be supplied to a three resistor external voltage divider comprised of the series connection of a 6 Kohm resistor and two 2 Kohm resistors. The 6 Kohm resistor would be connected to ground and the two 2 Kohm resistors would be connected in series between the 6 Kohm and the 10 volt reference. Thus at the high end of the 6 Kohm resistor would be provided a reference of 6 volts. At the junction between the two 2 Kohm resistors would be provided a reference of 8 volts. This would provide a window of plus and minus 1 volt with respect to a 7 volt reference. The 6 volts and 8 volts thus provided could then be fed back onto the monolithic chip. However, such a structure requires three external resistors and three integrated circuit connection pins on the monolithic structure (one to feed out the 10 volt reference and one each to return the 6 volt and 8 volt references).
Included among the many circuit designs for dual polarity voltage reference circuits are the designs set forth in the following United States Patents.
LaPorta et al U.S. Pat. No. 3,571,604 PA1 Nercessian et al U.S. Pat. No. 3,566,292 PA1 Torok U.S. Pat. No. 3,646,428 PA1 Saari U.S. Pat. No. 3,624,426 PA1 Marley U.S. Pat. No. 3,893,018
Of the above, those most pertinent to the invention hereinafter disclosed are believed to be the patents to Marley and Saari. Both Saari and Marley illustrate the use of the well known current mirror circuit. A current mirror is an interconnection of transistors which serve to duplicate the collector current of one of the transistors in the collectors of each of the other transistors of the current mirror. Thus by controlling the collector current of one transistor, another current of equal magnitude is caused to flow in the collectors of each other transistor in the mirror.
Marley shows one form of temperature coefficient compensation wherein the temperature coefficient of one portion of a circuit is duplicated by an equal temperature coefficient in another portion of the circuit such that the two portions of the circuit are equally affected thereby eliminating an unbalance in the two portions which would otherwise occur without the compensation.
The device of Marley shows the generation of two voltage references. However, in order to set the values of the two references, the value of at least two resistors must be determined. If it is desirable to have the two reference voltages be of equal magnitude the value of the two resistors must be equal. The device of Marley also teaches a form of temperature compensation. In order to adjust the temperature compensation characteristics of the device of FIG. 3 of Marley, the values of four separate resistors must be adjusted, although adjustment can be substantially accomplished by variation of a single resistor (R7) if that resistor is made to be a variable resistor.
Once the value of the two reference voltages are chosen, and the values of the two resistors thereby determined, and fabricated, their values cannot be readjusted. Once set, the values are fixed.
The patent to Saari shows one use of current mirror techniques to duplicate current level and shows one particular circuit configuration for supplying base current to the current mirror transistors. Saari is primarily a device for providing a current source for semiconductor circuits. Saari does not shown any temperature compensation techniques.
The various disadvantages of the referenced prior art devices are overcome by the circuit design disclosed herein. It is an object of the present invention to provide a temperature stable voltage reference circuit which provides two reference voltages, one of which is above a selected reference and another which is below the selected reference by the same amount.
It is also an object of the invention to provide such a dual level voltage reference circuit where both voltage levels are adjustable and determined by selection of a single resistor which is placed in the circuit from a single point in the circuit to ground, thereby minimizing the number of connections to the semiconductor chip that must be made to set the dual voltage reference levels.
Another object is to provide such a circuit which is suitable for use in monolithic semiconductor construction and wherein the dual voltage references are determined by the selection of a single set resistor which is external to the monolithic semiconductor structure.
Another objective is to provide a dual level voltage reference circuit, for fabrication on a monolithic semiconductor chip, which does not require an external D.C. voltage reference.